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Processors of the future

Posted in School with tags , , , , on November 11, 2008 by Lance Strzok

Processors of the Future

Considering the speed of light and the path length that data has to move as the limiting factors on moving bits around within any component between various components our goal will have to be to minimize the path lengths on each of them in relation to how often data is required to be used from these devices. Anticipating the need for data and moving data that is needed more often closer to a cpu or registers. No matter what the medium; fiber, metal, laser, or magnetic.

Next consider the clocking speed limitations. If they are dependent on the rise and decay time of capacitors, then we will have to remove capacitor technology and find a faster way of changing states of bits. This will have to be considered along with the path length issue to make sure that one is able to keep pace with the other. Clocking before the data gets to the processor or ALU would obviously cause problems, and would be the limiting factor in this case.

Software will have to change in order to fully utilize some features of future processors. Maybe there will be a way to do this on the fly (convert current software execution with one CPU to a parallel system that would allow other CPUs to process the instructions in parallel – faster). Be able to reconfigure the CPU for optimal execution of the software being used at the time.

Another gain to be had would be in the word sizes increasing in length, and with them, the busses and ALUs as well as memory address lengths that work with the data. But this could have software issues as well. Software not able to utilize these features would have to use another processor to convert the instructions to parallel then have the other CPUs execute the parallel instructions.

We will likely see hard drives continue to move to solid state hard drives which will improve access speeds greatly, and for all of the devices, lower power consumption (going green). Using technology that allows reliable state changes with less then 1 volt.

Maximize L1 and L2 caching by physically locating the fastest type of memory equidistant from the CPU (likely a circle or block around the CPU.

Each of the fundamental components (ram, rom, path medium, transistors, etc…) will continue to be explored in terms of materials that may increase speed, reduce power, not harm the environment when disposed of, be cheaper to manufacture, last longer, and be more reliable.

Implement some kind of executive function over the CPUs that would monitor and reconfigure the CPUs on the fly to maximize execution of the task at hand.

With all these considerations in mind, we will have incredibly fast, low power, environmentally friendly, reconfigurable CPUs that can work wonderfully as stand alone computers or be networked with other idle machines in the house or business to work on other problems when not fully utilized by the user.

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